Skip to main content
top

Bibliography

Martin Daněk

  1. Daněk Martin, Kafka Leoš, Kohout Lukáš, Sýkora JaroslavHardware Support for Fine-Grain Multi-Threading in LEON3 , Carpathian Journal of Electronic and Computer Engineering vol.4, 1 (2011), p. 27-34 [2011] Download
  2. Daněk MartinProgramovatelná hradlová pole - FPGA , Automa vol.12, 2 (2006), p. 9-13 [2006]

  1. Kubátová H., Hochberger Ch., Daněk Martin, Sick B.Architecture of Computing Systems - ARCS 2013, Springer, (Heidelberg 2013) Lecture Notes in Computer Science vol.7767 , International Conference of the Architecture of Computing Systems - ARCS 2013/ 26./, (Prague, CZ, 19.02.2013-22.02.2013) [2013] Download
  2. Bartosinski Roman, Daněk Martin, Sýkora Jaroslav, Kohout Lukáš, Honzík P.Foreground Detection and Image Segmentation in a Flexible ASVP Platform for FPGAs , Proceedings of the 2012 Conference on Design & Architectures for Signal & Image Processing, p. 375-376 , Eds: Morawiec Adam, Hinderscheit Jinnie , Conference on Design & Architectures for Signal & Image Processing, (Karlsruhe, DE, 23.10.2012-25.10.2012) [2012] Download
  3. Bartosinski Roman, Daněk Martin, Sýkora Jaroslav, Kohout Lukáš, Honzík P.Video Surveillance Application Based on Application Specific Vector Processors , Proceedings of the 2012 Conference on Design & Architectures for Signal & Image Processing, p. 248-255 , Eds: Morawiec Adam, Hinderscheit Jinnie , Conference on Design & Architectures for Signal & Image Processing, (Karlsruhe, DE, 23.10.2012-25.10.2012) [2012] Download
  4. Sýkora Jaroslav, Bartosinski Roman, Kohout Lukáš, Daněk Martin, Honzík P.Reducing Instruction Issue Overheads in Application-Specific Vector Processors , Proceedings of the 15th Euromicro Conference on Digital System Design, DSD 2012, p. 600-607 , Eds: Niar Smail, 15th Euromicro Conference on Digital System Design, (Cesme, TR, 05.09.2012-08.09.2012) [2012] Download
  5. Sýkora Jaroslav, Kohout Lukáš, Bartosinski Roman, Kafka Leoš, Daněk Martin, Honzík P.The Architecture and the Technology Characterization of an FPGA-based Customizable Application-Specific Vector Processor , Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, p. 62-67 , Eds: Raik, J. , Stopjaková, V. , Jenihhin, M. , Vierhaus, H., T. , Pleskacz, W. , Ubar, R. , 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, (Tallinn, EE, 18.04.2012-20.04.2012) [2012] Download DOI: 10.1109/DDECS.2012.6219026
  6. Sýkora Jaroslav, Kafka Leoš, Daněk Martin, Kohout LukášMicrothreading as a Novel Method for Close Coupling of Custom Hardware Accelerators to SVP Processors , 2011 14th Euromicro Conference on Digital System Design Architectures, Methods and Tools DSD 2011, p. 525-532 , Eds: Kitsos Paris, 14th Euromicro Conference on Digital System Design Architectures, Methods and Tools DSD 2011, (Oulu, FI, 31.08.2011-02.09.2011) [2011] Download
  7. Pacull F., Bertels K., Daněk Martin, Urlini G.SMECY: Smarti Multi-core Embedded SYstems (Special Session) , Proceedings of 21st Great Lakes Symposium on VLSI Design - GLSVLSI 2011, p. 427-428, 21st Great Lakes Symposium on VLSI Design - GLSVLSI 2011, (Lausanne, CH, 02.05.2011-04.05.2011) [2011] Download
  8. Sýkora Jaroslav, Kafka Leoš, Daněk Martin, Kohout LukášAnalysis of Execution Efficiency in the Microthreaded Processor UTLEON3 , Architecture of Computing Systems - ARCS 2011, p. 110-121 , Eds: Berekovic Mladen, ARCS 2011. International Conference on Architecture of computing systems /24./, (Camo, IT, 24.02.2011-25.02.2011) [2011] DOI: 10.1007/978-3-642-19137-4_10
  9. Kloub Jan, Honzík Petr, Daněk MartinReconfigurable Hardware Objects for Image Processing on FPGAs , Proceedings of the 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, p. 121-122, Proceedings of the 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, (Vienna, AT, 14.04.2010-16.04.2010) [2010] Download
  10. Daněk Martin, Kafka Leoš, Kohout Lukáš, Sýkora JaroslavInstruction Set Extensions for Multi-Threading in LEON3 , Proceedings of the13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, p. 237-242, DDECS 2010 : 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, (Vídeň, AT, 14.04.2010-16.04.2010) [2010] Download
  11. Daněk Martin, Kadlec Jiří, Nelson B.Proceedings 19th International Conference on Field Programmable Logic and Applications (FPL), ÚTIA AV ČR, (Praha 2009) , FPL 2009 19th International Conference on Field Programmable Logic and Applications, (Praha, CZ, 31.08.2009-02.09.2009) [2009]
  12. Daněk Martin, Philippe J.-M., Bartosinski Roman, Honzík Petr, Gamrat Ch.Self-Adaptive Networked Entities for Building Pervasive Computing Aschitectures , International Conference on Evolvable Systems: From Biology to Harware, 8th International Conference, ICES 2008, p. 94-105 , Eds: Hornby Gregory S., Sekanina Lukáš, Haddow Pauline C., International Conference on Evolvable Systems: From Biology to Harware, 8th International Conference, ICES 2008, (Praha, CZ, 22.09.2008-24.09.2008) [2008] Download
  13. Daněk Martin, Kadlec Jiří, Bartosinski Roman, Kohout LukášIncreasing the Level of Abstraction in FPGA-based Designes , International Conference on Field Programmable Logic and Applications, p. 5-10 , Eds: Kebschull Udo, International Conference on Field Programmable Logic and Applications, (Heidelberg, DE, 08.09.2008-10.09.2008) [2008] Download
  14. Kadlec Jiří, Daněk Martin, Kohout LukášProposed architecture of configurable, adaptable SoC , The IET Irish Signals and Systems Conference ISSC 2008, p. 368-373 , Eds: Morgan Fearghal, Glavin Martin, Jones Edward, The Institution of Engineering and Technology Irish Signals and Systems Conference, ISSC 2008, (Galway, IE, 18.06.2008-19.06.2008) [2008]
  15. Kafka Leoš, Daněk Martin, Novák O.Preservation of Circuit Structure and Timing during Fault Emulation in FPGA , IP 07 IP Based Electronic System Conference & Exhibition Proceedings, p. 493-497 , Eds: Saucier Gabriele, Nguyen Huy-Nam, IP 07 IP Based Electronic System Conference & Exhibition, (Grenoble, FR, 05.12.2007-06.12.2007) [2007]
  16. Kafka Leoš, Daněk Martin, Novák O.A Novel Emulation Technique that Preserves Circuit Structure and Timing , International Symposium on System-on-Chip 2007 Proceedings, p. 15-18 , Eds: Nurmi J., Takala J., Vainio O., International Symposium on System-on-Chip 2007 /9./, (Tampere, FI, 20.11.2007-21.11.2007) [2007]
  17. Bartosinski Roman, Daněk Martin, Honzík Petr, Kadlec JiříModelling Self-Adaptive Networked Entities in Matlab/Simulink , Technical Computing Prague 2007, p. 1-8, Technical Computing Prague 2007, (Praha, CZ, 14.11.2007-14.11.2007) [2007]
  18. Kadlec Jiří, Bartosinski Roman, Daněk MartinAccelerating MicroBlaze Floating Point Operations , Proceedings 2007 International Conference on Field Programmable Logic and Applications (FPL), p. 621-624 , Eds: Bertels Koen, Najjar Walid, Genderen Arjan, Vassiliadis Stamatis, International Conference on Field Programmable Logic and Applications. FPL 2007, (Amsterdam, NL, 27.08.2007-29.08.2007) [2007]
  19. Pohl Zdeněk, Daněk MartinFlash Formatter, ÚTIA AV ČR, (Praha 2007) [2007]
  20. Kadlec Jiří, Daněk MartinDesign and verification methodology for reconfigurable designs in Atmel FPSLIC , Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits adn Systems, p. 79-80 , Eds: Reorda M. S., Novák O., Straube B., DDECS 2006. IEEE Design and Diagnostics of Electronic Circuits and Systems, (Prague, CZ, 18.04.2006-21.04.2006) [2006]
  21. Daněk Martin, Heřmánek Antonín, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl ZdeněkGIN - notetaker for blind people: An example of using dynamic reconfiguration of FPGAs , ACACES 2005. Advanced Computer Architecture and Compilation for Embedded Systems, p. 15-18 , Eds: Bosschere K., HiPEAC Network of Excellence, (Ghent 2005) , ACACES 2005., (L'Aquila, IT, 26.07.2005) [2005]
  22. Bartosinski Roman, Daněk Martin, Honzík Petr, Matoušek RudolfDynamic reconfiguration in FPGA-based SoC designs , ACACES 2005. Advanced Computer Architecture and Compilation for Embedded Systems, p. 35-38 , Eds: Bosschere K., HiPEAC Network of Excellence, (Ghent 2005) , ACACES 2005., (L'Aquila, IT, 26.07.2005) [2005]
  23. Bartosinski Roman, Daněk Martin, Honzík Petr, Matoušek RudolfDynamic reconfiguration in FPGA-based SoC designs , Proceedings of the 8th IEEE Workshop on Designs and Diagnostics of Electronic Circuits nad Systems, p. 129-136 , Eds: Takách G., Hlawiczka A., Sziraj J., University of West Hungary, (Sopron 2005) , IEEE Design and Diagnostics of Electronic Circuits nad Systems Workshop (DDECS 2005) /8./, (Sopron, HU, 13.04.2005-16.04.2005) [2005]
  24. Nasi K., Daněk Martin, Karoubalis T., Pohl ZdeněkFigaro: An automatic tool flow for designs with dynamic reconfiguration. Abstract , FPGA 2005 - ACM/SIGDA Thirteenth ACM International Symposium on Field-Programmable Gate Arrays, p. 262 , Eds: Schmidt H., Wilton S., ACM, (Monterey 2005) , FPGA 2005 /13./, (Monterey, US, 20.02.2005-22.02.2005) [2005]
  25. Bartosinski Roman, Daněk Martin, Honzík Petr, Matoušek RudolfDynamic reconfiguration in FPGA-based SoC designs. Abstract , FPGA 2005 - ACM/SIGDA Thirteenth ACM International Symposium on Field-Programmable Gate Arrays, p. 274 , Eds: Schmidt H., Wilton S., ACM, (Monterey 2005) , FPGA 2005 /13./, (Monterey, US, 20.02.2005-22.02.2005) [2005]
  26. Kafka Leoš, Daněk MartinRETAC Application Notes 2005, ÚTIA AV ČR, (Praha 2005) [2005]
  27. Daněk Martin, Pohl Zdeněk, Nasi K., Karoubalis T.Figaro - an automatic tool flow for designs with dynamic reconfiguration , Proceedings of the 2005 International Conference on Field Programmable Logic and Applications. FPL 2005, p. 590-593 , Eds: Rissa T., Wilton S., Leong P., FPL 2005. International Conference on Field Programmable Logic and Applications, (Tampere, FI, 22.08.2006-26.08.2005) [2005]
  28. Kadlec Jiří, Daněk Martin, Honzík PetrReconfigurable Scrolling Demo, ÚTIA AV ČR, (Praha 2004) Research Report 2117 [2004]
  29. Kadlec Jiří, Daněk Martin, Honzík PetrReconfigurable 24-Bit Floating-Point Coprocessor Demo, ÚTIA AV ČR, (Praha 2004) Research Report 2116 [2004]
  30. Daněk Martin, Matoušek RadomilFLASH Read Controller for Atmel FPSLIC, ÚTIA AV ČR, (Praha 2004) Research Report 2114 [2004]
  31. Daněk Martin, Matoušek RudolfOverlay Controller for Atmel FPSLIC, ÚTIA AV ČR, (Praha 2004) Research Report 2113 [2004]
  32. Daněk Martin, Matoušek RudolfFLASH Formatter for the FLASH Expansion Board, ÚTIA AV ČR, (Praha 2004) Research Report 2112 [2004]
  33. Daněk Martin, Matoušek RudolfRandom Access FLASH Controller for Atmel FPSLIC, ÚTIA AV ČR, (Praha 2004) Research Report 2111 [2004]
  34. Daněk Martin, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl ZdeněkReconfigurable system-on-a-programmable-chip platform , Proceedings of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, p. 21-28, IEEE Workshop on DDECS 2004 /7./, (Stará Lesná, SK, 18.04.2004-21.04.2004) [2004]
  35. Daněk Martin, Kolář J.FPGA modelling for high-performance algorithms. Abstract , FPGA 2004 ACM/SIGDA Twelfth International Symposium on Field-Programmable Gate Arrays, p. 251, FPGA 2004 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays /12./, (Monterey, US, 22.02.2004-24.02.2004) [2004]
  36. Daněk MartinIntegrated iterative approach to FPGA placement , Počítačové Architektury & Diagnostika PAD 2003, p. 43-50 , Eds: Kotásek Z., Růžička R., Sekanina L., VUT, (Brno 2003) , PAD 2003 Počítačové Architektury & Diagnostika, (Zvíkovské Podhradí, CZ, 24.09.2003-26.09.2003) [2003]
  37. Matoušek Rudolf, Pohl Zdeněk, Daněk Martin, Kadlec JiříDynamic reconfiguration of Atmel FPGAs , UK ACM SIGDA 3rd Workshop on Electronic Design Automation, p. 1-4 , Eds: Hettiaratchi S., University of Southampton, (Southampton 2003) , UK ACM SIGDA Workshop on Electronic Design Automation /3./, (Southampton, GB, 11.09.2003-12.09.2003) [2003]
  38. Matoušek Rudolf, Pohl Zdeněk, Daněk Martin, Kadlec JiříDynamic reconfiguration of FPGAs , Recent Trends in Multimedia Information Processing. Proceedings, p. 288-291 , Eds: Šimák B., Zahradník P., Czech Technical University, (Prague 2003) , International Workshop on Systems, Signals and Image Processing /10./, (Praha, CZ, 10.09.2003-11.09.2003) [2003]
  39. Matoušek Rudolf, Daněk Martin, Pohl Zdeněk, Kadlec JiříDynamic runtime partial reconfiguration in FPGA , ECMS 2003. 6th International Workshop on Electronics, Control, Measurement and Signals, p. 294-298 , Eds: Nouza J., Drábková J., Technical University, (Liberec 2003) , ECMS 2003 /6./, (Liberec, CZ, 02.06.2003-04.06.2003) [2003]
  40. Daněk Martin, Muzikář Z.Evolutionary techniques in physical design for FPGAs , ECMS 2003. 6th International Workshop on Electronics, Control, Measurement and Signals, p. 274-278 , Eds: Drábková J., Nouza J., Technical University, (Liberec 2003) , ECMS 2003 /6./, (Liberec, CZ, 02.06.2003-04.06.2003) [2003]