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1ET400750408
Schier Jan, Kovář Bohumil, Zemčík P., Herout A., Zuzaňák J.
:
Configuration System for a DSP/FPGA-Based Embedded Accelerator
,
Digital Technologies 2007 Book of Abstracts, p. 32-33
, Eds: Jarina Roman,
Digital Technologies 2007,
(Žilina, SK, 30.11.2007) [2007]
Kovář Bohumil, Schier Jan, Zemčík P., Herout A., Zuzaňák J.
:
Simulink Model Converter for Embedded Video Accelerator
,
Technical Computing Prague 2007, p. 79-79,
Technical Computing Prague 2007,
(Praha, CZ, 14.11.2007-14.11.2007) [2007]
Kovář Bohumil, Schier Jan, Zemčík P., Herout A., Beran V.
:
Simulink as Tool for Prototyping Reconfigurable Image Processing Applications
,
Technical computing Prague 2006. 14th annual conference proceedings, p. 52-57
, Eds: Procházka A.,
Technical computing Prague 2006 /14./,
(Prague, CZ, 26.10.2006) [2006]
Zemčík P., Herout A., Beran V., Fučík A., Schier Jan
:
Reconfigurable image processing architecture
,
ICGST International Conference on Graphics, Vision and Image Processing. GVIP-05, p. 1-6,
International Conference on Graphics, Vision and Image Processing,
(Káhira, EG, 19.12.2005-21.12.2005) [2005]
Schier Jan, Kovář Bohumil, Zemčík P., Herout A., Beran V.
:
Reconfigurable image processing architecture with simulink prototyping support
,
Technical Computing Prague 2005. 13th Annual Conference Proceeding, p. 1-4
, Eds: Moler C., Procházka A., Walden B.,
MATLAB 05. Annual Conference of Technical Computing Prague 2005 /13./,
(Praha, CZ, 15.11.2005) [2005]
Heřmánek Antonín, Schier Jan, Regalia P.
:
Architecture design for FPGA implementation of finite interval CMA
,
Proceedings of the 12th European Signal Processing Conference, p. 1-4
, Eds: Hlawatsch F., Matz G., Rupp M.,
EUSIPCO 2004 /12./,
(Vienna, AT, 06.09.2004-10.09.2004) [2004]