Conference Paper (international conference)
serial: Proceedings of the 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems
action: The 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, (Vienna, AT, 14.04.2010-16.04.2010)
project(s): 7H09005, GA MŠk
keywords: convolution, CUDA, SIMD, HW implementation
Advanced image processing algorithms usually require high computing performance. Today's personal computers (PCs) offer satisfying resources for implementation of image processing tasks. However, as the image processing techniques are becoming more and more complex other implementation possibilities have to be searched. Since image processing algorithms usually comply with the Single Instruction Multiple Data (SIMD) model, implementation efforts using such hardware resources are suitable. An example of the SIMD hardware component available nowadays is the graphics processor (GPU) embedded in modern graphics cards manufactured for PCs. In this paper, the implementation of a blind image deconvolution algorithm using graphics processor as the SIMD computing resource is presented. The resulting performance is compared to the performance achieved on a common general-purpose processor (CPU).