Institute of Information Theory and Automation

Bibliography

Project IST-2001-34016

    Journal articles

    1. Daněk Martin, Honzík Petr, Kadlec Jiří, Pohl Zdeněk, Matoušek Rudolf :  Platforma s částečnou dynamickou rekonfigurací FPGA , Automa vol.12, 5 (2006), p. 40-43 [2006]
    2. Matoušek Rudolf, Daněk Martin, Kubátová H. :  Perspektivy dynamické rekonfigurace programovatelných polí FPGA , Sdělovací technika vol.54, 4 (2006), p. 3-6 [2006]
    3. Daněk Martin, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl Zdeněk :  Reconfigurable system on programmable chip platform , ATMEL Applications Journal, p. 9-12 [2005]

    Other publications

    1. Kadlec Jiří, Daněk Martin :  Design and verification methodology for reconfigurable designs in Atmel FPSLIC , Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits adn Systems, p. 79-80 , Eds: Reorda M. S., Novák O., Straube B., DDECS 2006. IEEE Design and Diagnostics of Electronic Circuits and Systems, (Prague, CZ, 18.04.2006-21.04.2006) [2006]
    2. Kadlec Jiří :  Reconfigurable floating point co-processor for atmel FPSLIC , MAPLD 2005 International Conference Proceedings, p. 1-12 , Eds: Katz R. B., MAPLD 2005 International Conference Proceedings, (Washington, US, 07.09.2005-09.09.2005) [2005]
    3. Bartosinski Roman, Daněk Martin, Honzík Petr, Matoušek Rudolf :  Dynamic reconfiguration in FPGA-based SoC designs. Abstract , FPGA 2005 - ACM/SIGDA Thirteenth ACM International Symposium on Field-Programmable Gate Arrays, p. 274 , Eds: Schmidt H., Wilton S., ACM, (Monterey 2005) , FPGA 2005 /13./, (Monterey, US, 20.02.2005-22.02.2005) [2005]
    4. Nasi K., Daněk Martin, Karoubalis T., Pohl Zdeněk :  Figaro: An automatic tool flow for designs with dynamic reconfiguration. Abstract , FPGA 2005 - ACM/SIGDA Thirteenth ACM International Symposium on Field-Programmable Gate Arrays, p. 262 , Eds: Schmidt H., Wilton S., ACM, (Monterey 2005) , FPGA 2005 /13./, (Monterey, US, 20.02.2005-22.02.2005) [2005]
    5. Kafka Leoš, Kielbik R., Matoušek Rudolf, Moreno J. M. :  VPart: An automatic partitioning tool for dynamic reconfiguration. Abstract , FPGA 2005 - ACM/SIGDA Thirteenth International Symposium on Field-Programmable Gate Arrays, p. 263 , Eds: Schmidt H., Wilton S., ACM, (Monterey 2005) , FPGA 2005 /13./, (Monterey, US, 20.02.2005-22.02.2005) [2005]
    6. Bartosinski Roman, Daněk Martin, Honzík Petr, Matoušek Rudolf :  Dynamic reconfiguration in FPGA-based SoC designs , Proceedings of the 8th IEEE Workshop on Designs and Diagnostics of Electronic Circuits nad Systems, p. 129-136 , Eds: Takách G., Hlawiczka A., Sziraj J., University of West Hungary, (Sopron 2005) , IEEE Design and Diagnostics of Electronic Circuits nad Systems Workshop (DDECS 2005) /8./, (Sopron, HU, 13.04.2005-16.04.2005) [2005]
    7. Bartosinski Roman, Daněk Martin, Honzík Petr, Matoušek Rudolf :  Dynamic reconfiguration in FPGA-based SoC designs , ACACES 2005. Advanced Computer Architecture and Compilation for Embedded Systems, p. 35-38 , Eds: Bosschere K., HiPEAC Network of Excellence, (Ghent 2005) , ACACES 2005., (L'Aquila, IT, 26.07.2005) [2005]
    8. Daněk Martin, Heřmánek Antonín, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl Zdeněk :  GIN - notetaker for blind people: An example of using dynamic reconfiguration of FPGAs , ACACES 2005. Advanced Computer Architecture and Compilation for Embedded Systems, p. 15-18 , Eds: Bosschere K., HiPEAC Network of Excellence, (Ghent 2005) , ACACES 2005., (L'Aquila, IT, 26.07.2005) [2005]
    9. Kafka Leoš, Matoušek Rudolf :  Design Retiming in HDL , Proceedings of Workshop 2005, p. 258-259 , Eds: Říha B., ČVUT, (Praha 2005) , Annual University-Wide Seminar. WORKSHOP 2005 /13./, (Praha, CZ, 21.03.2005-25.03.2005) [2005]
    10. Daněk Martin, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl Zdeněk :  Reconfigurable system-on-a-programmable-chip platform , Proceedings of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, p. 21-28, IEEE Workshop on DDECS 2004 /7./, (Stará Lesná, SK, 18.04.2004-21.04.2004) [2004]
    11. Pohl Zdeněk, Heřmánek Antonín :  ADPCM Demo, ÚTIA AV ČR, (Praha 2004) Research Report 2108 [2004]
    12. Pohl Zdeněk, Heřmánek Antonín :  ADPCM IP Cores, ÚTIA AV ČR, (Praha 2004) Research Report 2109 [2004]
    13. Honzík Petr :  Communication Library for AVR Microcontrollers, ÚTIA AV ČR, (Praha 2004) Research Report 2110 [2004]
    14. Daněk Martin, Matoušek Rudolf :  Random Access FLASH Controller for Atmel FPSLIC, ÚTIA AV ČR, (Praha 2004) Research Report 2111 [2004]
    15. Daněk Martin, Matoušek Rudolf :  FLASH Formatter for the FLASH Expansion Board, ÚTIA AV ČR, (Praha 2004) Research Report 2112 [2004]
    16. Daněk Martin, Matoušek Rudolf :  Overlay Controller for Atmel FPSLIC, ÚTIA AV ČR, (Praha 2004) Research Report 2113 [2004]
    17. Daněk Martin, Matoušek Radomil :  FLASH Read Controller for Atmel FPSLIC, ÚTIA AV ČR, (Praha 2004) Research Report 2114 [2004]
    18. Honzík Petr :  Getting Started with AVG-GCC, ÚTIA AV ČR, (Praha 2004) Research Report 2115 [2004]
    19. Kadlec Jiří, Daněk Martin, Honzík Petr :  Reconfigurable 24-Bit Floating-Point Coprocessor Demo, ÚTIA AV ČR, (Praha 2004) Research Report 2116 [2004]
    20. Kadlec Jiří, Daněk Martin, Honzík Petr :  Reconfigurable Scrolling Demo, ÚTIA AV ČR, (Praha 2004) Research Report 2117 [2004]
    21. Matoušek Rudolf, Honzík Petr :  SDIO Interface for the FPSLIC, ÚTIA AV ČR, (Praha 2004) Research Report 2118 [2004]
    22. Honzík Petr :  AVR core supported dynamic reconfiguration , POSTER 2004. Proceedings of the 8th International Student Conference on Electrical Engineering, p. 1-5 , Eds: Husník L., Lhotská L., International Student Conference on Electrical Engineering. POSTER 2004 /8./, (Praha, CZ, 20.05.2004) [2004]
    23. Matoušek Rudolf, Daněk Martin, Pohl Zdeněk, Kadlec Jiří :  Dynamic runtime partial reconfiguration in FPGA , ECMS 2003. 6th International Workshop on Electronics, Control, Measurement and Signals, p. 294-298 , Eds: Nouza J., Drábková J., Technical University, (Liberec 2003) , ECMS 2003 /6./, (Liberec, CZ, 02.06.2003-04.06.2003) [2003]
    24. Heřmánek Antonín, Pohl Zdeněk, Kadlec Jiří :  FPGA implementation of the adaptive lattice filter , Field-Programmable Logic and Applications. Proceedings of the 13th International Conference, p. 1095-1098 , Eds: Cheung P. Y. K., Constantinides G. A., de Sousa J. D., Springer, (Berlin 2003) Lecture Notes in Computer Science. vol.2778 , Field Programmable Logic and Applications /13./, (Lisabon, PT, 01.09.2003-03.09.2003) [2003]
    25. Schier Jan, Kadlec Jiří :  Using logarithmic arithmetic for FPGA implementation of the Givens rotations , Proceedings of the Sixth Baiona Workshop on Signal Processing in Communications, p. 199-204 , Eds: Mosquera C., Perez-Gonzales F., Universidade de Vigo, (Vigo 2003) , Baiona Workshop on Signal Processing Communications /6./, (Baiona, ES, 08.09.2003-10.09.2003) [2003]
    26. Matoušek Rudolf, Pohl Zdeněk, Daněk Martin, Kadlec Jiří :  Dynamic reconfiguration of FPGAs , Recent Trends in Multimedia Information Processing. Proceedings, p. 288-291 , Eds: Šimák B., Zahradník P., Czech Technical University, (Prague 2003) , International Workshop on Systems, Signals and Image Processing /10./, (Praha, CZ, 10.09.2003-11.09.2003) [2003]
    27. Líčko Miroslav, Schier Jan :  FPGA Prototyping Using Extensions to MATLAB/Simulink , UK ACM SIGDA 3rd Workshop on Electronic Design Automation, p. 1-3 , Eds: Hettiaratchi S., University of Southampton, (Southampton 2003) , UK ACM SIGDA Workshop on Electronic Design Automation /3./, (Southampton, GB, 11.09.2003-12.09.2003) [2003]
    28. Matoušek Rudolf, Pohl Zdeněk, Daněk Martin, Kadlec Jiří :  Dynamic reconfiguration of Atmel FPGAs , UK ACM SIGDA 3rd Workshop on Electronic Design Automation, p. 1-4 , Eds: Hettiaratchi S., University of Southampton, (Southampton 2003) , UK ACM SIGDA Workshop on Electronic Design Automation /3./, (Southampton, GB, 11.09.2003-12.09.2003) [2003]
    29. Matoušek Rudolf :  Dynamic reconfiguration of FPGAs: a case study , Počítačové Architektury & Diagnostika PAD 2003, p. 17-23 , Eds: Kotásek Z., Růžička R., Sekanina L., VUT, (Brno 2003) , PAD 2003 Počítačové Architektury & Diagnostika, (Zvíkovské Podhradí, CZ, 24.09.2003-26.09.2003) [2003]
    30. Pohl Zdeněk, Schier Jan, Líčko Miroslav, Heřmánek Antonín, Tichý Milan :  Logarithmic arithmetic for real data types and support for Matlab/Simulink based rapid-FPGA-prototyping , Proceedings of the International Parallel and Distributed Processing Symposium. IPDPS 2003, p. 1-6 , Eds: Werner B., IEEE Computer Society Press, (Los Alamitos 2003) , IEEE IPDPS 2003, (Nice, FR, 22.04.2003-26.04.2003) [2003]
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    Last modification: 03.01.2013
    Institute of Information Theory and Automation