Institute of Information Theory and Automation

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Bibliography

Jiří Kadlec


Books and chapters

  1. Gamrat Ch., Philippe J. M., Jesshope Ch., Shafarenko A., Bisdounis L., Bondi U., Ferrante A., Cabestany J., Hübner M., Pärsinnen J., Kadlec Jiří, Daněk Martin, Tain B., Eisenbach S., Auguin M., Diguet J. P., Lenormand E., Roux J. L.AETHER: Self-Adaptive Networked Entities: Autonomous Computing Elements for Future Pervasive Applications and Technologies , Reconfigurable Computing. From FPGAs to Hardware/Software Codesign, p. 149-184 , Eds: Cardoso Joao, Hübner Michael [2011] Download
  2. Dulík T., Křivka Z., Kadlec Jiří, Bližňák M., Budíková V., Jirák O., Olšarová N., Trbušek J., Vašíček Z.Virtuální laboratoř pro vývoj aplikací s mikroprocesory a FPGA, CERM, (Brno 2011) [2011] Download
  3. Hillerová E., Kadlec JiříCzech Republic, Information Society Technology, ÚTIA AV ČR, (Praha 1999) [1999]
  4. Kadlec Jiří, Gaston F. M. F., Irwin G. W.Parallel implementation of restricted parameter tracking , Mathematics in Signal Processing, p. 315-325 , Eds: McWhirter J. G., Clarendon Press, (Oxford 1994) Institute of Mathematics and its Applications Conference Series. vol.49 [1994]

Journal articles

  1. Coufalová V., Zsapková Haringová D., Kadlec JiříÚčast České republiky ve společných technologických iniciativách ARTEMIS, ENIAC a ECSEL , Echo vol.2016, p. 12-14 [2016] Download
  2. Kadlec Jiří, Sebroňová E.Účast ČR v projektech programu ICT HORIZONT 2020 v porovnání se zeměmi EU-13 , Echo vol.2015, p. 11-15 [2015] Download
  3. Kadlec Jiří, Sebroňová E.Zhodnocení účasti ČR v projektech priority ICT 7. RP v porovnání se zeměmi EU-12 , Echo, 3 (2014), p. 9-12 [2014] Download
  4. Kadlec Jiří, Nedvědová K.Artemis JU and Eniac JU Projects with Czech Participation , Automa, p. 6-9 [2013] Download
  5. Kadlec JiříCzech Companies Involved in the ARTEMIS Programme , Automa, p. 4-5 [2013] Download
  6. Kadlec JiříElektronika pro zvýšení bezpečnosti malých městských automobilů , Elektro vol.2013, p. 21-21 [2013] Download
  7. Kadlec JiříElektronika pro zvýšení bezpečnosti malých městských automobilů , Automa vol.19, 2 (2013), p. 54-55 [2013] Download
  8. Kadlec Jiří, Bystřická J.Výsledky třetí výzvy programu společných technologických iniciativ ARTEMIS JU a ENIAC JU , Echo vol.2011, 2 (2011), p. 18-19 [2011] Download
  9. Pohl Zdeněk, Tichý Milan, Kadlec JiříImplementation of the Least-Squares Lattice with Order and Forgetting Factor Estimation for FPGA , EURASIP Journal on Advances in Signal Processing vol.2008, 2008 (2008), p. 1-11 [2008] Download
  10. Coleman J. N., Softley C. I., Kadlec Jiří, Matoušek R., Tichý Milan, Pohl Zdeněk, Heřmánek Antonín, Benschop N. F.The European Logarithmic Microprocessor , IEEE Transactions on Computers vol.57, 4 (2008), p. 532-546 [2008] Download
  11. Kadlec Jiří, Vaculíková E.ARTEMIS - šance pro výzkum v oboru vestavných systémů - polemika , Automa vol.13, 10 (2007), p. 13-15 [2007]
  12. Kadlec Jiří, Vaculíková E.Podpora projektů informační a komunikační techniky v 7.rámcovém programu EU pro výzkum , Automa vol.13, 5 (2006), p. 82-83 [2006]
  13. Kadlec Jiří, Chappel S.Implementing floating-point DSP , Embedded Magazine vol.2, 3 (2006), p. 12-14 [2006] Download
  14. Daněk Martin, Honzík Petr, Kadlec Jiří, Pohl Zdeněk, Matoušek RudolfPlatforma s částečnou dynamickou rekonfigurací FPGA , Automa vol.12, 5 (2006), p. 40-43 [2006]
  15. Kadlec Jiří, Albrecht V.Význam účasti v projektech EU , Echo vol.2, 2 (2005), p. 11-13 [2005]
  16. Daněk Martin, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl ZdeněkReconfigurable system on programmable chip platform , ATMEL Applications Journal, p. 9-12 [2005]
  17. Kadlec JiříIDEALIST: Jak najít partnery pro projekty IST , Echo, p. 13 [2004]
  18. Kadlec Jiří, Matoušek Rudolf, Heřmánek Antonín, Líčko Miroslav, Tichý MilanLattice for FPGAs using logarithmic arithmetic , Electronic Engineering vol.74, 906 (2002), p. 53-56 [2002]
  19. Hlavička J., Kadlec JiříVstup do evropské informační společnosti - program IST , Automa vol.6, 7 (2000), p. 105-107 [2000]
  20. Coleman J. N., Chester E. I., Softley C. I., Kadlec JiříArithmetic on the European Logarithmic Microprocessor , IEEE Transactions on Computers vol.49, 7 (2000), p. 702-715 [2000]
  21. Kadlec Jiří, Schier JanAnalysis of a normalized QR filter using Bayesian description of propagated data , International Journal of Adaptive Control and Signal Processing vol.13, 6 (1999), p. 487-505 [1999]
  22. Kadlec Jiří, Gaston F. M. F., Irwin G. W.A parallel fixed-point predictive controller , International Journal of Adaptive Control and Signal Processing vol.11, 5 (1997), p. 415-430 [1997] Download
  23. Kadlec JiříTransputer implementation of block regularized filtering , Kybernetika vol.32, 3 (1996), p. 235-250 [1996]
  24. Kadlec Jiří, Gaston F. M. F., Irwin G. W.The block regularised parameter estimator and its parallelisation , Automatica vol.31, 8 (1995), p. 1125-1136 [1995] Download
  25. Kadlec Jiří, Masarik G., Nguyen D. H.Paralelní počítače a superpočítače dneška , Computer World vol.10, 10 (1991), p. 18-19 [1991]

Other publications

  1. Kadlec Jiří, Pohl Zdeněk, Kohout LukášCompact Zynq System with SW-defined Floating-Point 8xSIMD EdkDSP Accelerator, ( 2018) [2018] Download
  2. Kadlec Jiří, Pohl Zdeněk, Kohout LukášSW Defined Floating Point 8xSIMD EdkDSP IP Serving for Adaptive Noise Cancellation, ( 2018) [2018] Download
  3. Kadlec Jiří, Pohl Zdeněk, Kohout LukášVideo Processing Demonstrator with Full HD Sensor and 8xSIMD EdkDSP Accelerator IP Core, ( 2018) [2018] Download
  4. Likhonina Raissa, Kohout Lukáš, Kadlec JiříCamera-to-touchscreen design , Proceedings of 6th International Workshop on Mathematical Models and their Applications (IWMMA’2017), p. 94-99, 6th International Workshop on Mathematical Models and their Applications (IWMMA’2017), (Krasnojarsk, RU, 20171113) [2017] Download
  5. Kadlec Jiří, Likhonina RaissaAdaptive RLS Algorithms Reference Implementations, ( 2017) [2017] Download
  6. Isakovic H., Grosu R., Ratasich D., Kadlec Jiří, Pohl Zdeněk, Kerrison S.A Survey of Hardware Technologies for Mixed-Critical Integration Explored in the Project EMC2 , Computer Safety, Reliability, and Security : SAFECOMP 2017 Workshops, ASSURE, DECSoS, SASSUR, TELERISE, and TIPS, p. 127-140 , Eds: Tonetta Stefano, Schoitsch Erwin, Bitsch Friedemann, SAFECOMP 2017 International Conference on Computer Safety, Reliability, and Security, (Trento, IT, 20170912) [2017] Download
  7. Zsapková Haringová D., Kadlec JiříInformační den: Informační a komunikační technologie v programu Horizont 2020, (Praha, CZ, 20160922) [2016] Download
  8. Kohout Lukáš, Pohl Zdeněk, Kadlec JiříEMC2-DP HDMI in HDMI out Platform, ( 2016) [2016] Download
  9. Pohl Zdeněk, Kohout Lukáš, Kadlec JiříALMARVI Python Camera Platform, ( 2016) [2016] Download
  10. Kadlec Jiří, Pohl Zdeněk, Kohout LukášToshiba Video Sensor Evaluation Platform for TE0720-03-2IF SoM on TE0701-05 Carrier, ( 2016) [2016] Download
  11. Kadlec Jiří, Pohl Zdeněk, Kohout LukášPython 1300 Video Sensor Evaluation Platform for TE0720-03-2IF SoM on TE0701-05 Carrier, ( 2016) [2016] Download
  12. Kadlec Jiří, Zsapková Haringová D.Information and communication technologies in Horizon 2020, (Praha, CZ, 02.10.2015) [2015] Download
  13. Kadlec JiříVideo Chain Demonstrator on Xilinx Kintex7 FPGA with EdkDSP Floating Point Accelerators , Proceedings 2015 International Conference on Embedded Computer Systems: Architectures, Modelling and Simulation (SAMOS XV) , Eds: Soudris Dimitrios, Carro Luigi, International Conference on Embedded Computer Systems: Architectures, Modelling and Simulation (SAMOS XV), (Agios Konstantinos, Samos, GR, 20.07.2015-23.07.2015) [2015]
  14. Kadlec Jiří, Zsapková Haringová D., Sebroňová E.Informační a komunikační technologie v programu Horizont 2020, (Praha, CZ, 06.02.2015-06.02.2015) [2015] Download
  15. Kadlec Jiří, Sebroňová E.Setkání zástupců v oblasti ICT v ČR a seznámení s draftem pracovního programu pro oblast ICT v H2020, (Praha, CZ, 13.09.2013-13.09.2013) [2013]
  16. Kadlec JiříEDKDSP: Reprogrammable Floating Point Accelerators on KINTEX FPGA with HDMI , 2013 Design, Automation and Test in Europe, DATE 2013 Design, Automation and Test in Europe, (Grenoble, FR, 2013.03.18-2013.03.22) [2013] Download
  17. Lohstroh J., Schutz E., Kadlec JiříARTEMIS Brokerage Event Call 2012, (Praha, CZ, 17.01.2012-18.01.2012) [2012] Download
  18. Kadlec JiříIn-circuit, Run-time Compiler of Finite State Machines for the UTIA EdkDSP Customizable Accelerators , Fourth Friday Workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, p. 32-33 , Eds: Silvano Cristina, Agosta Giovanni, Cardoso Joao, DATE 2012 - Design Automation and Test in Europe conference and exhibition, (Dresden, DE, 12.03.2012-16.03.2012) [2012] Download
  19. Honzík P., Kadlec JiříDynamic Placement Applications into Self Adaptive Network on FPGA , 2011 IEEE 14th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS 2011), p. 453-456 , Eds: Vierhaus Heinrich T. , Pawlak Adam, Schölzel Mario, Steininger Andreas, Kraemer Rolf, Raik Jaan, 14th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2011), (Cottbus, DE, 13.04.2011-15.04.2011) [2011] Download
  20. Kadlec JiříÚčast ČR ve společných technologických iniciativách ARTEMIS a ENIAC , Hovory s informatiky, p. 95-113 , Eds: Klímová H., Kuželová D., Šíma J., Wiedermann J., Žák S., Hovory s informatiky 2011, (Praha, CZ, 25.10.2011) [2011] Download
  21. Kadlec Jiří, Bystřická J., Rakušanová K.Český národní informační den společných technologických iniciativ ARTEMIS a ENIAC, (Praha, CZ, 21.03.2011) [2011]
  22. Kadlec Jiří, Kafka Leoš, Svozil J.NOR FLASH Core – Funkční vzorek řadiče paměti Intel StrataFlash, ( 2011) [2011]
  23. Kadlec Jiří, Kafka Leoš, Svozil J.SPI FLASH Core – Funkční vzorek řadiče paměti SPI Serial Flash, ( 2011) [2011]
  24. Kadlec Jiří, Kafka Leoš, Svozil J.AD Core – Funkční vzorek řadiče A/D převodníku se sběrnicí SPI, ( 2011) [2011]
  25. Kadlec Jiří, Kafka Leoš, Stejskal J.BASIC IO CORE – Funkční vzorek řadiče elektronického potenciometru, ( 2011) [2011]
  26. Kadlec Jiří, Kafka Leoš, Svozil J.DA Core - Funkční vzorek řadiče D/A převodníku se sběrnicí SPI, ( 2011) [2011]
  27. Kadlec Jiří, Kafka Leoš, Stejskal J.PWM Core - funkční vzorek generátoru pulzně šířkové modulace, ( 2011) [2011]
  28. Kadlec Jiří, Kafka Leoš, Svozil J.FG Core - funkční vzorek generátoru kmitočtu, ( 2011) [2011]
  29. Kadlec Jiří, Kafka Leoš, Svozil J.FC Core - funkční vzorek čítače frekvence, ( 2011) [2011]
  30. Kadlec Jiří, Kafka Leoš, Svozil J.LCD Core - Funkční vzorek řadiče LCD displeje, ( 2011) [2011]
  31. Daněk Martin, Kadlec Jiří, Nelson B.Proceedings 19th International Conference on Field Programmable Logic and Applications (FPL), ÚTIA AV ČR, (Praha 2009) , FPL 2009 19th International Conference on Field Programmable Logic and Applications, (Praha, CZ, 31.08.2009-02.09.2009) [2009]
  32. Kadlec Jiří, Kadlecová MiladaARTEMIS / ENIAC Joint Undertaking - Seminář ke 2. výzvě, (Praha, CZ, 02.03.2009) [2009]
  33. Svozil Jiří, Stejskal Jaroslav, Kafka Leoš, Kadlec JiříPicoBlaze lekce 4: Aplikace pro výuku asembleru procesoru PicoBlaze, ( 2008) [2008]
  34. Stejskal Jaroslav, Svozil Jiří, Kafka Leoš, Kadlec JiříŘadiče periferií pro vývojovou desku Spartan3E Starter Kit, ( 2008) [2008]
  35. Pohl Zdeněk, Kadlec Jiří, Tichý MilanAdaptive Noise Canceller Migration Demo, ( 2008) [2008]
  36. Kadlec Jiří, Kadlecová Milada, Daněk MartinWorkshop on Embedded Systems Education and Training, (Athény, GR, 05.06.2008) [2008]
  37. Daněk Martin, Kadlec Jiří, Bartosinski Roman, Kohout LukášIncreasing the Level of Abstraction in FPGA-based Designes , International Conference on Field Programmable Logic and Applications, p. 5-10 , Eds: Kebschull Udo, International Conference on Field Programmable Logic and Applications, (Heidelberg, DE, 08.09.2008-10.09.2008) [2008] Download
  38. Kadlec JiříDesign Flow for Reconfigurable MicroBlaze Accelerators , 4th International Workshop on Reconfigurable Communication Centric System-on-Chips Workshop Proceedings, p. 133-140 , Eds: Moreno Manuel J., Madrenas Jordi, Sassatelli Gilles, Hübner Michael, Zipf Peter, ReCoSoC 2008 4th Reconfigurable Communication-centric Systems-on-Chip workshop, (Barcelona, ES, 09.07.2008-11.07.2008) [2008]
  39. Kadlec Jiří, Daněk Martin, Kohout LukášProposed architecture of configurable, adaptable SoC , The IET Irish Signals and Systems Conference ISSC 2008, p. 368-373 , Eds: Morgan Fearghal, Glavin Martin, Jones Edward, The Institution of Engineering and Technology Irish Signals and Systems Conference, ISSC 2008, (Galway, IE, 18.06.2008-19.06.2008) [2008]
  40. Kadlec Jiří, Kadlecová MiladaARTEMIS / ENIAC Joint Undertaking Information event, (Praha, CZ, 16.05.2008) [2008]
  41. Kadlec JiříEmbedded Development Environment for a Family of Xilinx FPGA , Regional Conference on Embedded and Ambient Systems Book of Abstracts, p. 16-16 , Eds: Varga Antila K., Kiss Ákos, Marsiske Stefan, Vásárhelyi József, RCEAS 2007 First Regional Conference on Embedded and Ambient Systems, (Budapešť, HU, 22.11.2007-24.11.2007) [2007]
  42. Kadlec JiříPreparation ARTEMIS and the Czech republic: current status and related issues , Regional Conference on Embedded and Ambient Systems Book of Abstracts, p. 15-15 , Eds: Varga Antila K., Kiss Ákos, Marsiske Stefan, Vásárhelyi József, RCEAS 2007 First Regional Conference on Embedded and Ambient Systems, (Budapešť, HU, 22.11.2007-24.11.2007) [2007]
  43. Pohl Zdeněk, Kadlec Jiří, Tichý MilanAdaptive Noise Canceller Demo based on the LS Lattice Filter, ( 2007) [2007]
  44. Bartosinski Roman, Daněk Martin, Honzík Petr, Kadlec JiříModelling Self-Adaptive Networked Entities in Matlab/Simulink , Technical Computing Prague 2007, p. 1-8, Technical Computing Prague 2007, (Praha, CZ, 14.11.2007-14.11.2007) [2007]
  45. Bartosinski Roman, Kadlec JiříSimulation of MCU hardware peripherals , Technical Computing Prague 2007, p. 1-7, Technical Computing Prague 2007, (Praha, CZ, 14.11.2007-14.11.2007) [2007]
  46. Kadlec Jiří, Bartosinski Roman, Daněk MartinAccelerating MicroBlaze Floating Point Operations , Proceedings 2007 International Conference on Field Programmable Logic and Applications (FPL), p. 621-624 , Eds: Bertels Koen, Najjar Walid, Genderen Arjan, Vassiliadis Stamatis, International Conference on Field Programmable Logic and Applications. FPL 2007, (Amsterdam, NL, 27.08.2007-29.08.2007) [2007]
  47. Svozil Jiří, Stejskal Jaroslav, Kafka Leoš, Kadlec JiříPicoBlaze lekce 3: sériová komunikace RS232 a testování IP jader pomocí procesoru PicoBlaze, ÚTIA AV ČR, (Praha 2007) [2007]
  48. Stejskal Jaroslav, Kafka Leoš, Kadlec JiříPicoBlaze lekce 2: generování VHDL a implementace systému s procesorem PicoBlaze do FPGA v prostředí Xilinx ISE, ÚTIA AV ČR, (Praha 2007) [2007]
  49. Svozil Jiří, Kafka Leoš, Kadlec JiříPicoBlaze lekce 1: assembler, C překladač a simulační prostředí, ÚTIA AV ČR, (Praha 2007) [2007]
  50. Kadlec Jiří, Daněk Martin, Schier Jan, Kohout Lukáš, Kafka Leoš, Kloub Jan, Stejskal Jaroslav, Svozil JiříIdentifikace limitací dosavadních technologií v kontextu projektu VLAM, ÚTIA AV ČR, (Praha 2007) Research Report 2183 [2007]
  51. Pohl Zdeněk, Kadlec JiříRLS Lattice Demo, ÚTIA AV ČR, (Praha 2006) [2006]
  52. Kadlec Jiří, Kadlecová MiladaPřechod ústavů Akademie věd na V.V.I . a jeho dopad na běžící projekty 6.RP EU, (Praha, CZ, 14.11.2006) [2006]
  53. Kadlec Jiří, Kadlecová MiladaRobotics in IST FP7, (Praha, CZ, 07.11.2006) [2006]
  54. Bartosinski Roman, Kadlec JiříHardware co-simulation with communication server from MATLAB/Simulink , Technical computing Prague 2006. 14th annual conference proceedings, p. 13-20 , Eds: Procházka A., Technical computing Prague 2006 /14./, (Prague, CZ, 26.10.2006) [2006]
  55. Kadlec Jiří, Daněk MartinDesign and verification methodology for reconfigurable designs in Atmel FPSLIC , Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits adn Systems, p. 79-80 , Eds: Reorda M. S., Novák O., Straube B., DDECS 2006. IEEE Design and Diagnostics of Electronic Circuits and Systems, (Prague, CZ, 18.04.2006-21.04.2006) [2006]
  56. Daněk Martin, Heřmánek Antonín, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl ZdeněkGIN - notetaker for blind people: An example of using dynamic reconfiguration of FPGAs , ACACES 2005. Advanced Computer Architecture and Compilation for Embedded Systems, p. 15-18 , Eds: Bosschere K., HiPEAC Network of Excellence, (Ghent 2005) , ACACES 2005., (L'Aquila, IT, 26.07.2005) [2005]
  57. Kadlec Jiří, Kadlecová MiladaVýměna zkušeností řešitelů evropských projektů po 1. kole auditů 6. RPEU, (Praha, CZ, 03.11.2005) [2005]
  58. Pohl Zdeněk, Kadlec Jiří, Šůcha P., Hanzálek Z.Performance tuning of interative algorithms in signal processing , Proseedings of the 2005 International Conference on Field Programmable Logic and Applications. FPL 2005, p. 699-702 , Eds: Rissa T., Wilton S., Leong P., FPL 2005. International Conference on Field Programmable Logic and Applications, (Tampere, FI, 24.08.2005-26.08.2005) [2005]
  59. Kadlec JiříScalable Floating Point Simulation Package float-dk-rel2. (Program), ÚTIA AV ČR, (Praha 2005) [2005]
  60. Kadlec JiříDouble Precision Simulation Package double-dk-rel2. (Program), ÚTIA AV ČR, (Praha 2005) [2005]
  61. Kadlec Jiří, Gook R.Floating point controller as a picoblaze network on a single spartan 3 FPGA , MAPLD 2005 International Conference Proceeding, p. 1-11 , Eds: Katz R. B., MAPLD 2005 International Conference, (Washington, US, 07.09.2005-09.09.2005) [2005]
  62. Kadlec JiříReconfigurable floating point co-processor for atmel FPSLIC , MAPLD 2005 International Conference Proceedings, p. 1-12 , Eds: Katz R. B., MAPLD 2005 International Conference Proceedings, (Washington, US, 07.09.2005-09.09.2005) [2005]
  63. Kadlec Jiří, Daněk Martin, Honzík PetrReconfigurable Scrolling Demo, ÚTIA AV ČR, (Praha 2004) Research Report 2117 [2004]
  64. Kadlec Jiří, Daněk Martin, Honzík PetrReconfigurable 24-Bit Floating-Point Coprocessor Demo, ÚTIA AV ČR, (Praha 2004) Research Report 2116 [2004]
  65. Kadlec Jiří, Kadlecová MiladaWorkshop FET. Future and Emerging Technologies in the frame of IST FP6, (Praha, CZ, 14.05.2004) [2004]
  66. Daněk Martin, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl ZdeněkReconfigurable system-on-a-programmable-chip platform , Proceedings of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, p. 21-28, IEEE Workshop on DDECS 2004 /7./, (Stará Lesná, SK, 18.04.2004-21.04.2004) [2004]
  67. Líčko Miroslav, Matulík Radim, Matoušek Rudolf, Kadlec JiříPrototyping Board for CAK. (Program), ÚTIA AV ČR, (Praha 2003) [2003]
  68. Líčko Miroslav, Kadlec JiříAn Introduction to the Xilinx System Generator. (Program), ÚTIA AV ČR, (Praha 2003) [2003]
  69. Matoušek Rudolf, Líčko Miroslav, Kadlec JiříEuropean Logarithmic Microprocessor. (Program), ÚTIA AV ČR, (Praha 2003) [2003]
  70. Pohl Zdeněk, Kadlec Jiří, Líčko Miroslav, Matoušek Rudolf, Tichý MilanLattice IP Core used in Real-time Lattice Demo on XESS Board. (Program), ÚTIA AV ČR, (Praha 2003) [2003]
  71. Pohl Zdeněk, Kadlec Jiří, Tichý MilanRLS Lattice - Celoxica RC200 Demo. (Program), ÚTIA AV ČR, (Praha 2003) [2003]
  72. Matoušek Rudolf, Pohl Zdeněk, Daněk Martin, Kadlec JiříDynamic reconfiguration of Atmel FPGAs , UK ACM SIGDA 3rd Workshop on Electronic Design Automation, p. 1-4 , Eds: Hettiaratchi S., University of Southampton, (Southampton 2003) , UK ACM SIGDA Workshop on Electronic Design Automation /3./, (Southampton, GB, 11.09.2003-12.09.2003) [2003]
  73. Matoušek Rudolf, Pohl Zdeněk, Daněk Martin, Kadlec JiříDynamic reconfiguration of FPGAs , Recent Trends in Multimedia Information Processing. Proceedings, p. 288-291 , Eds: Šimák B., Zahradník P., Czech Technical University, (Prague 2003) , International Workshop on Systems, Signals and Image Processing /10./, (Praha, CZ, 10.09.2003-11.09.2003) [2003]
  74. Schier Jan, Kadlec JiříUsing logarithmic arithmetic for FPGA implementation of the Givens rotations , Proceedings of the Sixth Baiona Workshop on Signal Processing in Communications, p. 199-204 , Eds: Mosquera C., Perez-Gonzales F., Universidade de Vigo, (Vigo 2003) , Baiona Workshop on Signal Processing Communications /6./, (Baiona, ES, 08.09.2003-10.09.2003) [2003]
  75. Heřmánek Antonín, Pohl Zdeněk, Kadlec JiříFPGA implementation of the adaptive lattice filter , Field-Programmable Logic and Applications. Proceedings of the 13th International Conference, p. 1095-1098 , Eds: Cheung P. Y. K., Constantinides G. A., de Sousa J. D., Springer, (Berlin 2003) Lecture Notes in Computer Science. vol.2778 , Field Programmable Logic and Applications /13./, (Lisabon, PT, 01.09.2003-03.09.2003) [2003]
  76. Matoušek Rudolf, Daněk Martin, Pohl Zdeněk, Kadlec JiříDynamic runtime partial reconfiguration in FPGA , ECMS 2003. 6th International Workshop on Electronics, Control, Measurement and Signals, p. 294-298 , Eds: Nouza J., Drábková J., Technical University, (Liberec 2003) , ECMS 2003 /6./, (Liberec, CZ, 02.06.2003-04.06.2003) [2003]
  77. Pohl Zdeněk, Matoušek Rudolf, Kadlec Jiří, Tichý Milan, Líčko M.Lattice adaptive filter implementation for FPGA , FPGA 2003 ACM/SIGDA Eleventh ACM International Symposium on Field-Programmable Gate Arrays, p. 246, ACM, (Monterey 2003) , FPGA 2003, (Monterey, US, 23.02.2003-25.02.2003) [2003]
  78. Grabowiecki T., Kadlec Jiří, Čerans K., Pihl T., Weber B., Zergoi T.Ideal-ist Conference Information Society Technology in the 6th Framework Programme, ( 2002) , (Varšava, PL, 25.11.2002-26.11.2002) [2002]
  79. Smith B., Edin M., Hillerová E., Kadlecová Milada, Heřmánková Dana, Kadlec Jiříe-2002 e-Work & e-Business Conference, ( 2002) , (Praha, CZ, 16.10.2002-18.10.2002) [2002]
  80. Líčko Miroslav, Schier Jan, Pohl Zdeněk, Kadlec Jiří, Tichý Milan, Matoušek Rudolf, Heřmánek AntonínLogarithmic Arithmetic for Real Data Types and Support for MATLAB/SIMULINK Based Rapid-FPGA-Prototyping, ÚTIA AV ČR, (Praha 2002) Research Report 2069 [2002]
  81. Albu F., Kadlec Jiří, Coleman N., Fagan A.The Gauss-Seidel Fast Affine Projection algorithm , IEEE Workshop on Signal Processing Systems. Proceedings, p. 109-114 , Eds: Parhi K., Shanbhag N., IEEE, (San Diego 2002) , SIPS 2002, (San Diego, US, 16.10.2002-18.10.2002) [2002]
  82. Albu F., Kadlec Jiří, Heřmánek Antonín, Fagan A., Coleman N.Analysis of the LNS implementation of the fast affline projection algorithms , Proceedings of the Irish Signals and Systems Conference 2002. ISSC 2002, p. 251-255 , Eds: Marnane W., Lightbody G., Pesch D., Institute of Technology, (Cork 2002) , Irish Signals and Systems Conference 2002, (Cork, IE, 25.06.2002-26.06.2002) [2002]
  83. Albu F., Kadlec Jiří, Coleman N., Fagan A.Pipelined implementations of the A Priory Error-Feedback LSL algorithm using logarithmic arithmetic , Proceedings of the IEEE International Conference on Acoustics, Speech and Signal Processing, p. 2681-2684, IEEE, (Orlando 2002) , ICASSP 2002, (Orlando, US, 13.05.2002-17.05.2002) [2002]
  84. Matoušek Rudolf, Tichý Milan, Pohl Zdeněk, Kadlec Jiří, Softley C.Logarithmic number system and floating-point arithmetics on FPGA , Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream, p. 627-636 , Eds: Glesner M., Zipf P., Renovell M., Springer, (Berlin 2002) Lecture Notes in Computer Science. vol.2438 , International Conference FPL 2002 /12./, (Montpellier, FR, 02.09.2002-04.09.2002) [2002]
  85. Kadlec Jiří, Tichý Milan, Heřmánek Antonín, Pohl Z., Líčko M.Matlab Toolbox for high-level bit-exact emulation of HandelC VHDL FPGA designs , Design, Automation and Test in Europe DATE˙02, p. 264 , Eds: Sciuto D., Kloos C. D., IEEE, (Los Alamitos 2002) , Design, Automation and Test in Europe DATE˙02, (Paris, FR, 04.03.2002-08.03.2002) [2002]
  86. Matoušek R., Pohl Z., Kadlec Jiří, Tichý Milan, Heřmánek AntonínLogarithmic arithmetic core based RLS LATTICE implementation , Design, Automation and Test in Europe DATE 02, p. 271 , Eds: Sciuto D., Kloos C. D., IEEE, (Los Alamitos 2002) , Design, Automation and Test in Europe DATE 02, (Paris, FR, 04.03.2002-08.03.2002) [2002]
  87. Pleger R., Kadlec Jiří, Grabowiecki T., Kadlecová Milada, Krekels D., Heřmánek AntonínIdeal-ist Workshop European IT Research Programme (IST) Successful Proposal Writing, ( 2001) , (Dresden, DE, 17.09.2001) [2001]
  88. Kadlec Jiří, Heřmánková Dana, Rektorová Alice, Drath P., Schoefield M., Martynovicz P.Opportunities in the European Union's IST Programme, ( 2001) , (Praha, CZ, 13.11.2001-14.11.2001) [2001]
  89. Kadlec Jiří, Kadlecová Milada, Pleger R., Grabowiecki T., Zergoi T., Krekels D.Ideal-ist Workshop European IT Research Programme (IST) Successful Proposal Writing, ( 2001) , (Praha, CZ, 26.09.2001) [2001]
  90. Kadlec Jiří, Heřmánková Dana, Trojanowski K., Drath P., Schoefield M., Burak R.Managing EC Research Project - Workshop and Brokerage, ( 2001) , (Praha, CZ, 11.12.2001) [2001]
  91. Kadlec Jiří, Albu F., Softley Ch., Matoušek Rudolf, Heřmánek AntonínRLS Lattice for Virtex FPGA using 32-bit and 20-bit Logarithmic Arithmetic, ÚTIA AV ČR, (Praha 2001) Research Report 2036 [2001]
  92. Kadlec Jiří, Heřmánek Antonín, Softley Ch., Matoušek Rudolf, Líčko Miroslav32-bit Logarithmic ALU for Handel-C 2.1 and Celoxica DK1, ÚTIA AV ČR, (Praha 2001) Research Report 2037 [2001]
  93. Heřmánek Antonín, Kadlec Jiří, Matoušek Rudolf, Líčko Miroslav, Softley Ch.Pipelined Logarithmic 32bit ALU for Celoxica DK1, ÚTIA AV ČR, (Praha 2001) Research Report 2034 [2001]
  94. Coleman J. N., Kadlec Jiří, Matoušek Rudolf, Pohl Zdeněk, Heřmánek AntonínThe European Logarithmic Microprocessor - a QRD RLS Applications, ÚTIA AV ČR, (Praha 2001) Research Report 2038 [2001]
  95. Albu F., Kadlec Jiří, Matoušek Rudolf, Heřmánek Antonín, Coleman J. N.A Comparison of FPGA Implementation of the A Priori Error-Feedback LSL Algorithm using Logarithmic Arithmetic, ÚTIA AV ČR, (Praha 2001) Research Report 2035 [2001]
  96. Albu F., Kadlec Jiří, Softley Ch., Matoušek Rudolf, Heřmánek AntonínImplementation of Normalized RLS Lattice on Virtex, ÚTIA AV ČR, (Praha 2001) Research Report 2040 [2001]
  97. Coleman J. N., Kadlec JiříExtended Precision Logarithmic Arithmetic , Signal Systems and Computers 2000, 34th Asilomar Conference on Signal Systems and Computers. Proceedings, p. 124-129, IEEE Signal Processing Society, (Monterey 2001) , Asilomar conference on Signal Systems and Computers /34./, (Monterey, US, 07.11.2000) [2001]
  98. Schier Jan, Kadlec Jiří, Moonen M.Implementing Advanced Equalization Algorithms using Simulink with Embedded Alpha AXP Coprocessor, ÚTIA AV ČR, (Praha 2001) Research Report 2013 [2001]
  99. Heřmánek Antonín, Kadlec Jiří, Matoušek Rudolf, Líčko Miroslav, Pohl ZdeněkPipelined logarithmic 32bit ALU for Celoxica DK1 , Sborník příspěvků 9.ročníku konference MATLAB 2001, p. 72-80 , Eds: Procházka A., Uhlíř J., VŠCHT, (Praha 2001) , MATLAB 2001 /9./, (Praha, CZ, 11.10.2001) [2001]
  100. Kadlec Jiří, Coleman J. N.Extended Precision LNS Arithmetic, ÚTIA AV ČR, (Praha 2001) Research Report 2008 [2001]
  101. Kadlec Jiří, Matoušek Rudolf, Líčko MiroslavFPGA Implementation of Logarithmic Unit Core, ÚTIA AV ČR, (Praha 2001) Research Report 2007 [2001]
  102. Kadlec Jiří, Matoušek Rudolf, Heřmánek Antonín, Líčko Miroslav, Softley Ch.Logarithmic ALU 32-bit for Handel C 2.1 and Celoxica DK1 , Celoxica User Conference. Proceedings, Celoxica, (Abington 2001) , Celoxica User Conference /1./, (Stratford, GB, 02.04.2001-04.04.2001) [2001] Download
  103. Albu F., Kadlec Jiří, Fagan A., Coleman J. N.Implementation of Error-Feedback RLS Lattice on Virtex using logarithmic arithmetic , Advances in Systems Science: Measurement, Circuits and Control. Proceedings, p. 517-521 , Eds: Mastorakis N. E., Pecorelli-Peres L. A., WSES Press, (Rethymno 2001) , WSES International Conference on Circuits, Systems, Communications and Computers. CSCC 2001 /5./, (Rethymno, GR, 08.07.2001-15.07.2001) [2001]
  104. Kadlec JiříReview and Classification of RLS Array Algorithms for LNS Arithmetics, ÚTIA AV ČR, (Praha 2001) Research Report 2006 [2001]
  105. Kadlec Jiří, Matoušek Rudolf, Líčko MiroslavFPGA implementation of logarithmic unit core , Embedded Intelligence 2001, p. 547-554, Design & Elektronik, (Nürnberg 2001) , Embedded Intelligence 2001, (Nürnberg, DE, 14.02.2001-16.02.2001) [2001]
  106. Albu F., Kadlec Jiří, Softley Ch., Matoušek Rudolf, Heřmánek Antonín, Coleman J. N., Fagan A.Implementation of (Normalised) RLS Lattice on Virtex , Field-Programmable Logic and Applications. Proceedings, p. 91-100 , Eds: Brebner G., Woods R., Springer, (Berlin 2001) Lecture Notes in Computer Science. vol.2147 , International Conference FPL 2001, (Belfast, IE, 27.08.2001-29.08.2001) [2001]
  107. Kadlec JiříStructure estimation for systems described by radial basis functions based on normalized QR filtering , Preprints of the 1st IFAC/IEEE Symposium on System Structure and Control, IFAC, (Prague 2001) , IFAC/IEEE Symposium on System Structure and Control /1./, (Prague, CZ, 29.08.2001-31.08.2001) [2001]
  108. Coleman J. N., Chester E. I., Softley Ch., Kadlec JiříArithmetic on the European Logarithmic Microprocessor, ÚTIA AV ČR, (Praha 2001) Research Report 2012 [2001]
  109. Schier Jan, Kadlec Jiří, Moonen M.Implementing advanced equalization algorithms using Simulink with embedded Alpha AXP coprocessor , Fifth IMA International Conference on Mathematics in Signal Processing, p. 11-14, University of Warwick, (Warwick 2000) , Mathematics in Signal Processing /5./, (Warwick, GB, 18.12.2000-20.12.2000) [2000]
  110. Ondračka J., Oravec R., Kadlec Jiří, Cocherová E.Simulation of RLS and LMS algorithms for adaptive noise cancellation in MATLAB , Sborník příspěvků 8. ročníku konference MATLAB 2000, p. 301-305, VŠCHT, (Praha 2000) , MATLAB 2000 /8./, (Praha, CZ, 01.11.2000) [2000]
  111. Heřmánek Antonín, Matoušek Rudolf, Líčko Miroslav, Kadlec JiříFPGA implementation of logarithmic unit , Sborník příspěvků 8. ročníku konference MATLAB 2000, p. 84-90, VŠCHT, (Praha 2000) , MATLAB 2000 /8./, (Praha, CZ, 01.11.2000) [2000]
  112. Hlavička J., Kadlec JiříVstup českých institucí do evropské informační společnosti , Česko-slovenská konference RUFIS 2000, p. 27-32, VUT, (Brno 2000) , Česko-slovenská konference RUFIS 2000., (Brno, CZ, 05.09.2000-06.09.2000) [2000]
  113. Tesař Ludvík, Berec Luděk, Dolanc G., Szederkényi G., Kadlec JiříA toolbox for model-based fault detection and isolation , European Control Conference. ECC '99, VDI/VDE GMA, (Karlsruhe 1999) , European Control Conference. ECC '99, (Karlsruhe, DE, 31.08.1999-03.09.1999) [1999] Download
  114. Kadlec Jiří, Barbier A., de Castellane L., Gautier L.-P., Gourguechon S., Leroy S., Paturle A.Generation of Simulink S-functions, ÚTIA AV ČR, (Praha 1999) Research Report 1975 [1999]
  115. Hillerová E., Kadlec JiříKonference k zahájení 5. rámcového programu Evropské unie, MŠMT, (Praha 1999) , Konference 5. rámcového programu Evropské unie /5./, (Praha, CZ, 05.02.1999) [1999]
  116. Hillerová E., Kadlec JiříInformační den k programu IST, Technologické centrum AV ČR, (Praha 1999) , Seminář k programu IST /5./, (Praha, CZ, 23.09.1999) [1999]
  117. Kadlec Jiří, Matoušek Rudolf, Vialatte Christian, Coleman J. N.Port of Pascal FPGA-logarithmic-unit simulator to Simulink/RTW , Sborník příspěvků 7. ročníku konference MATLAB '99, p. 84-90, VŠCHT, (Praha 1999) , MATLAB '99 /7./, (Praha, CZ, 03.11.1999) [1999]
  118. Vialatte Christian, Kadlec JiříRTW support for parallel 64-bit Alpha AXP-based platforms , Sborník příspěvků 7. ročníku konference MATLAB '99, p. 238-244, VŠCHT, (Praha 1999) , MATLAB '99 /7./, (Praha, CZ, 03.11.1999) [1999]
  119. Vialatte Christian, Kadlec JiříRTW support for low cost C31 board , Sborník příspěvků 7. ročníku konference MATLAB '99, p. 231-237, VŠCHT, (Praha 1999) , MATLAB '99 /7./, (Praha, CZ, 03.11.1999) [1999]
  120. Kárný Miroslav, Kadlec Jiří, Sutanto E. L.Quasi-Bayes estimation applied to normal mixture , Preprints of the 3rd European IEEE Workshop on Computer-Intensive Methods in Control and Data Processing, p. 77-82 , Eds: Rojíček J., Valečková M., Kárný M., Warwick K., ÚTIA AV ČR, (Praha 1998) , CMP '98 /3./, (Praha, CZ, 07.09.1998-09.09.1998) [1998] Download
  121. Schier Jan, Kadlec Jiří, Böhm JosefRobust adaptive controller with fine grain parallelism , Preprints of the IFAC Workshop on Adaptive Systems in Control and Signal Processing, p. 436-441, IFAC, (Glasgow 1998) , Adaptive Systems in Control and Signal Processing, (Glasgow, GB, 26.08.1998-28.08.1998) [1998] Download
  122. Kadlec JiříAcceleration of computation-intensive algorithms on parallel Alpha AXP processors , Preprints of the 3rd European IEEE Workshop on Computer-Intensive Methods in Control and Data Processing, p. 89-98 , Eds: Rojíček J., Valečková M., Kárný M., Warwick K., ÚTIA AV ČR, (Praha 1998) , CMP'98 /3./, (Praha, CZ, 07.09.1998-09.09.1998) [1998] Download
  123. Kadlec Jiří, Schier JanNumerical Analysis of a Normalized QR Filter Using Probability Description of Propagated Data, ÚTIA AV ČR, (Praha 1998) Research Report 1923 [1998]
  124. Kadlec Jiří, Schier JanHSLA 3D Monitor Package, ÚTIA AV ČR, (Praha 1998) Research Report 1925 [1998]
  125. Kadlec Jiří, Schier JanHSLA DSP Package, ÚTIA AV ČR, (Praha 1998) Research Report 1924 [1998]
  126. Kadlec Jiří, Schier JanResults of the Global Probability Analysis Approach, ÚTIA AV ČR, (Praha 1998) Research Report 1926 [1998]
  127. Kadlec Jiří, Schier JanRapid prototyping of adaptive control algorithms on parallel multiprocessors , Signal Processing Symposium, p. 115-118, IEEE, (Leuven 1998) , SPS '98, (Leuven, BE, 26.03.1998-27.03.1998) [1998] Download
  128. Kadlec Jiří, Vialatte Ch.Rapid prototyping and parallel processing under MATLAB 5 , MATLAB Conference 1997, p. 120-125, Kimhua Technology, (Seoul 1997) , MATLAB Conference '97, (Seoul, KR, 13.10.1997-14.10.1997) [1997]
  129. Kadlec JiříParallel processing on Alphas under MATLAB 5 , SOFSEM '97: Theory and Practice of Informatics, p. 440-448 , Eds: Plášil F., Jeffery K. G., Springer, (Berlin 1997) Lecture Notes in Computer Science. vol.1338 , Seminar on Current Trends in Theory and Practice of Informatics /24./, (Milovy, CZ, 22.11.1997-29.11.1997) [1997]
  130. Kadlec JiříPara-Mat parallel processing under MATLAB , Simulationstechnik. Tagungsband, p. 684-687 , Eds: Kuhn A., Wenzel S., Vieweg, (Braunschweig 1997) ASIM vol.11 , Simulationstechnik. /11./, (Dortmund, DE, 11.11.1997-14.11.1997) [1997]
  131. Kadlec JiříRapid prototyping and parallel processing under MATLAB 5 , Tagungsband. 3. Zittauer Workshop Magnetlagertechnik, p. 101-104 , Eds: Hampel R., Worlitz F., IPM, (Zittau 1997) Wissenschftliche Berichte. vol.51 , Zittauer Workshop Magnetlagertechnik /3./, (Zittau, DE, 11.09.1997-12.09.1997) [1997] Download
  132. Nedoma Petr, Kadlec JiříExtension of MATLAB parallel accelerator , Computer-Intensive Methods in Control and Signal Processing. Preprints of the 2nd European IEEE Workshop CMP'96, p. 155-160 , Eds: Berec L., Rojíček J., Kárný M., Warwick K., ÚTIA AV ČR, (Praha 1996) , European IEEE Workshop CMP'96 /2./, (Prague, CZ, 28.08.1996-30.08.1996) [1996]
  133. Kadlec Jiří, Nakhaee N.Alpha Bridge - high performance computing with MATLAB , Industrial Applications of MATLAB and Simulink for the Analysis of Electro- and Hydro- Mechanical Systems. Preprints, p. 11-16, Matlab UG, (Birmingham 1995) , Special Interest Meeting: Industrial Applications /1./, (Birmingham, GB, 20.09.1995) [1995] Download
  134. Kadlec Jiří, Gaston F. M. F., Irwin G. W.The block regularised parameter estimator and its parallelisation , Identification and Optimization, Oriented for Use in Adaptive Control. Preprints, p. 107-120 , Eds: Böhm J., Rojíček J., ÚTIA AV ČR, (Praha 1995) , Summer School Course, (Prague, CZ, 17.07.1995-18.07.1995) [1995]
  135. McWhirter J. G., Walke R. L., Kadlec JiříNormalised Givens rotations for recursive least squares processing , VLSI Signal Processing, VIII, p. 313-322 , Eds: Nishitani T., Parhi K., IEEE, (New York 1995) , IEEE Workshop on VLSI Signal Processing /8./, (Sakai, JP, 16.10.1995-18.10.1995) [1995]
  136. Kadlec Jiří[Recenze] , Automatica vol.31, 10 (1995), p. 1519-1521 [1995]
  137. Kadlec Jiří, Nakhaee N.Alpha-Bridge for MATLAB 4 , Transputer Applications and Systems '95. Proceedings, p. 175-189 , Eds: Cook B. M., Nixon P., IOS Press, (Harrogate 1995) , World Transputer Congress '95, (Harrogate, GB, 04.09.1995-06.09.1995) [1995]
  138. Kadlec Jiří, Gaston F. M. F.Identification with directional parameter tracking for high-performance fixed-point implementations , The Sixth Irish DSP and Control Colloquium, p. 215-222 , Eds: Gaston F., Dodds G., Techman, (Belfast 1995) , IDSPCC '95 /6./, (Belfast, IE, 19.06.1995-20.06.1995) [1995] Download
  139. Kadlec JiříNumerical analysis of normalized RLS filter using a probability description of propagated data , Algorithms and Parallel VLSI Architectures III, p. 61-72 , Eds: Moonen M., Catthor F., Elsevier, (Amsterdam 1994) , Algorithms and Parallel VLSI Architectures /3./, (Leuven, BE, 29.08.1994-31.08.1994) [1994]
  140. Kadlec Jiří[Recenze] , Automatica vol.30, 5 (1994), p. 917-918 [1994]
  141. Kadlec JiříDirect software bridge MATLAB-transputer boards , Signal Processing Conference. Proceedings, p. 1601-1604 , Eds: Covan C. F. N., EUSIPCO, (Edinburgh 1994) , EUSIPCO '94. European Signal Processing Conference /7./, (Edinburgh, GB, 13.09.1994-16.09.1994) [1994]
  142. Kadlec JiříNumerical analysis of normalized RGS filter by probability description of propagated data. Abstract , Algorithms and Parallel VLSI Architectures. Abstracts, p. -, Katholieke Universiteit, (Leuven 1994) , International Workshop on Algorithms and Parallel VLSI Architectures /3./, (Leuven, BE, 29.08.1994-31.08.1994) [1994]
  143. Gaston F. M. F., Kadlec Jiří, Schier JanThe block regularized linear quadratic optimal controller , IEE International Conference on Control '94, p. 1254-1259, IEE, (London 1994) IEE. vol.389 , CONTROL '94, (Warwick, GB, 21.03.1994-24.03.1994) [1994] Download
  144. Kadlec JiříSystolic arrays for identification of systems with variable structure , Computer-Intensive Methods in Control and Signal Processing, p. 123-132 , Eds: Kulhavá L., Kárný M., Warwick K., ÚTIA AV ČR, (Praha 1994) , IEEE Workshop CMP '94, (Praha, CZ, 07.09.1994-09.09.1994) [1994]
  145. Kadlec JiříParallel Normalized Identification Algorithm with Lattice Feedback Regularization, ÚTIA AV ČR, (Praha 1994) Research Report 1820 [1994]
  146. Kadlec JiříDirect Software Bridge MATLAB-Transputer Boards, ÚTIA AV ČR, (Praha 1994) Research Report 1819 [1994]
  147. Kadlec JiříNumerical Analysis of a Normalized RLS Filter Using a Probability Description of Propagated Data, ÚTIA AV ČR, (Praha 1994) Research Report 1818 [1994]
  148. Kadlec JiříSystolic Arrays for Identification of Systems with Variable Structure, ÚTIA AV ČR, (Praha 1994) Research Report 1817 [1994]
  149. Kadlec JiříLattice feedback regularised identification , 10th IFAC Symposium on System Identification. Preprints, p. 277-282 , Eds: Blanke M., Söderström T., IFAC, (Copenhagen 1994) , IFAC SYSID '94 /10./, (Copenhagen, DK, 04.07.1994-06.07.1994) [1994]
  150. Kadlec JiříMatlab transputer bridge. Abstract , 10th IFAC Symposium on System Identification. Preprints, p. 31 , Eds: Blanke M., Söderström T., IFAC, (Copenhagen 1994) , IFAC SYSID '94 /10./, (Copenhagen, DK, 04.07.1994-06.07.1994) [1994]
  151. Gaston F. M. F., Kadlec Jiří, Schier JanThe Block Regularised Linear Quadratic Optimal Controller, ÚTIA AV ČR, (Praha 1994) Research Report 1789 [1994]
  152. Kadlec JiříTransputer Implementation of Block Regularised Filtering, ÚTIA AV ČR, (Praha 1994) Research Report 1791 [1994]
  153. Kadlec JiříStructure Determination and Tracking for Parallel Radial Basic Function Based Nonlinear Networks, ÚTIA AV ČR, (Praha 1994) Research Report 1790 [1994]
  154. Kadlec JiříLattice Feedback Regularised Identification, ÚTIA AV ČR, (Praha 1994) Research Report 1788 [1994]
  155. Kadlec JiříThe Cell-Level Description of Systolic Block Regularised QR Filter., ÚTIA AV ČR, (Praha 1994) Research Report 1792 [1994]
  156. Kadlec Jiří, Gaston F. M. F., Irwin G. W.The Block Regularised Parameter Estimator and Its Parallel Implementation, ÚTIA AV ČR, (Praha 1994) Research Report 1787 [1994]
  157. Kadlec Jiří, Gaston F. M. F., Irwin G. W.Regularised Lattice-Ladder Adaptive Filter, ÚTIA AV ČR, (Praha 1994) Research Report 1793 [1994]
  158. Kadlec Jiří, Gaston F. M. F., Irwin G. W.Regularised Lattice-Ladder Adaptive Filter , Mutual Impact of Computing Power and Control Theory, p. 245-257 , Eds: Kárný M., Warwick K., Plenum Press, (New York 1993) , IFAC Workshop on the Mutual Impact of Computing Power and Control Theory, (Prague, CZ, 01.09.1992-02.09.1992) [1993]
  159. Kadlec JiříStructure Determination and Tracking for Parallel Radial Basis Function Based Nonlinear Networks , Innovative Approaches to Modelling and Optimal Control of Large Scale Pipeline Networks, p. 75-84 , Eds: Králik J., ÚTIA AV ČR, (Prague 1993) , International Workshop SIMONE /2./, (Prague, CZ, 27.09.1993-30.09.1993) [1993]
  160. Kadlec JiříThe Cell Level Description of Systolic Block Regularised QR Filter , VLSI Signal Processing, p. 298-306 , Eds: Eggermont L. D. J., Dewilde P., IEEE, (New York 1993) , VLSI Signal Processing, (Veldhoven, NL, 20.10.1993-22.10.1993) [1993]
  161. Kadlec JiříTransputer Implementation of Block Regularised Filtering , Progress in Transputer Computing Technology, p. 1-15 , Eds: Kulhavá L., Schier J., Kárný M., ÚTIA AV ČR, (Prague 1993) , TCT'93 International Workshop, (Prague, CZ, 04.05.1993-05.05.1993) [1993]
  162. Kadlec Jiří, Gaston F. M. F., Irwin G. W.A Nonlinear Systolic Filter with Radial Basis Function Estimation , Neural Computing Research and Applications, p. 183-190 , Eds: Hilger A., IOP Publ., (London 1993) , Neural Computing Research and Applications, (Belfast, GB, 25.06.1992-26.06.1992) [1993]
  163. Kadlec JiříThe Lattice-Ladder with Generalized Forgetting , Linear Algebra for Large Scale and Real-Time Applications, p. 397-398 , Eds: Moonen M. S., Golub G. H., De Moor B. L. R., Kluwer Academic, (Leuven 1993) NATO ASI Series. Series E: Applied Sciences. vol.232 , Proceedings of the NATO Advanced Study Institute on Linear Algebra for Large Scale and Real-Time Applications, (Leuven, BE, 03.08.1992-14.08.1992) [1993]
  164. Kadlec Jiří, Gaston F. M. F., Irwin G. W.Parallel Implementation of Restricted Parameter Tracking, Queen's University, (Belfast 1993) Research Report 1/2 [1993]
  165. Kadlec JiříFast Ladder-Lattice Identification Architecture with Numerically Robust Tracking of Parameters , Algorithms and Architectures for Real-Time Control, p. 105-111 , Eds: Fleming P. O., Jones D. I., Pergamon Press, (Oxford 1992) IFAC Workshop Series. vol.4 , IFAC Workshop on Algorithms and Architectures for Real-Time Control, (Bangor, GB, 11.09.1991-13.09.1991) [1992]
  166. Kadlec Jiří, Gaston F. M. F., Irwin G. W.Systolic Implementation of the Regularized Parameter Estimator , VLSI Signal Processing 6, p. 520-529 , Eds: Yao K., Jain R., Przytula W., Rabaey J., IEEE, (New York 1992) , Workshop on VLSI Signal Processing, (Napa, US, 28.10.1992-30.10.1992) [1992]
  167. Kadlec JiříUnified Design of Fast Array Estimators, Queen's University, (Belfast 1992) Research Report 1/6 [1992]
  168. Kadlec Jiří, Gaston F. M. F., Irwin G. W.Parallel Implementation of Restricted Parameter Tracking , Mathematics in Signal Processing, p. 86-88, University of Warwick, (SouthendonSea 1992) , IMA Conference on Mathematics in Signal Processing /3./, (Warwick, GB, 15.12.1992-17.12.1992) [1992]
  169. Kadlec Jiří, Gaston F. M. F., Irwin G. W.Regularised Lattice-Ladder Adaptive Filter , IFAC Workshop on Mutual Impact of Computing Power and Control Theory. MICC '92, p. 143-150 , Eds: Kárný M., Warwick K., ÚTIA ČSAV, (Prague 1992) , IFAC Workshop on Mutual Impact of Computing Power and Control Theory. MICC '92, (Praha, CS, 01.09.1992-02.09.1992) [1992]
  170. Nedoma Petr, Kadlec Jiří, Schier JanTools for Implementation of Parallel Algorithms for Adaptive Control and Signal Processing , 4th IFAC International Symposium on Adaptive Systems in Control and Signal Processing. ACASP '92, p. 727-730 , Eds: Landau I. D., Dugard L., M'Saad M., Laboratoire d'Automatique, (Grenoble 1992) , IFAC International Symposium on Adaptive Systems in Control and Signal Processing. ACASP '92 /4./, (Grenoble, FR, 01.07.1992-03.07.1992) [1992]
  171. Kadlec JiříA Joint Criterion for Exponential Directional and Mixed Parameter Tracking , 4th IFAC International Symposium on Adaptive Systems in Control and Signal Processing. ACASP '92, p. 687-692 , Eds: Landau I. D., Dugard L., M'Saad M., Laboratoire d'Automatique, (Grenoble 1992) , IFAC International Symposium on Adaptive Systems in Control and Signal Processing. ACASP '92 /4./, (Grenoble, FR, 01.07.1992-03.07.1992) [1992]
  172. Kadlec JiříNeural Nets for System Applications, IEE/ÚTIA, (Praha 1991) , Neural Nets for System Applications, (Prague, CS, 20.05.1990-21.05.1990) [1991]
  173. Kadlec JiříIdentification Algorithms for Parallel Computing Networks with Fixed Point Arithmetic , Neural Nets for System Applications, p. -, IEE/ÚTIA, (Prague 1991) , Neural Nets for System Applications, (Prague, CS, 20.05.1990-21.05.1990) [1991]
  174. Kadlec JiříFast and Adaptive Identification Algorithms Suitable for Neural Network Applications , Neural Nets for System Applications, p. -, IEE/ÚTIA, (Prague 1991) , Neural Nets for System Applications, (Prague, CS, 20.05.1990-21.05.1990) [1991]
  175. Kadlec JiříA Recursive Modified Gram-Schmidt Identification with Directional Tracking of Parameters , Preprints of the 9th IFAC/IFORS Symposium on Identification and System Parameter Estimation, p. 1707-1712, AKA PRINT Nyomdaipari, (Budapest 1991) , IFAC/IFORS Symposium on Identification and System Parameter Estimation /9./, (Budapest, HU, 08.07.1991-12.07.1991) [1991]
  176. Kadlec Jiří, Matulík RadimTerminály pro zrakově postižené, ÚTIA ČSAV, (Praha 1990) Research Report 1691 [1990]
  177. Kadlec Jiří, Krampe G.Bayesian Analysis of System Parameter Variations, Based on Testing of Hypotheses about Forgetting Factors, RuhrUniversität, (Bochum 1989) Research Report [1989]
bocek: 2015-01-12 10:44