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Journal Article

FPGA implementace LMS a N-LMS algoritmu pro potlačení akustického echa

Mazanec Tomáš, Brothánek M.

: Akustické listy vol.10, 4 (2004), p. 9-13

: CEZ:AV0Z1075907

: FPGA, LMS algorithm, Handel-C

(cze): Cílem práce bylo implementovat metodu kompenzace echa na platformě programovatelného obvodu FPGA. Řešení zahrnuje jak praktické využití adaptivní filtrace, tak implementaci zadané úlohy do HW podoby.

(eng): This article describes implementation of echo canceller on a FPGA programmable device (Xilinx, Virtex), which was done. The solution of this adaptive filtering task was aimed to least squares algorithms, especially to the LMS and normalized LMS algorithm. Used digital filterswere the type of finite impulse response in transveral structure. The FPGA implementation was created in Handel-C of DK 2.0 system which is designed to rapis prototyping flow.

: 090

: JC