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Abstract

EDKDSP: Reprogrammable Floating Point Accelerators on KINTEX FPGA with HDMI

Kadlec Jiří

: 2013 Design, Automation and Test in Europe

: DATE 2013 Design, Automation and Test in Europe, (Grenoble, FR, 2013.03.18-2013.03.22)

: 7H12004, GA MŠk

: FPGA, programmable accelerators, computer video processing

: http://library.utia.cas.cz/separaty/2013/ZS/kadlec-edkdsp reprogrammable floating point accelerators on kintex fpga with hdmi.pdf

(eng): Presentation of the EdkDSP reprogrammable floating point accelerators on the Xilinx Kintex FPGA (KC705) together with the HDMI video I/O (ON Semiconductor Image sensor/HDMI 1080p60). Presented SoC is using the 512 bit wide AXI-4 buses and several independent VDMA controllers.

: JC

2019-01-07 08:39