Ústav teorie informace a automatizace

Jste zde

Bibliografie

Leoš Kafka

  1. Daněk Martin, Kafka Leoš, Kohout Lukáš, Sýkora JaroslavHardware Support for Fine-Grain Multi-Threading in LEON3 , Carpathian Journal of Electronic and Computer Engineering vol.4, 1 (2011), p. 27-34 [2011] Download

  1. Sýkora Jaroslav, Kohout Lukáš, Bartosinski Roman, Kafka Leoš, Daněk Martin, Honzík P.The Architecture and the Technology Characterization of an FPGA-based Customizable Application-Specific Vector Processor , Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, p. 62-67 , Eds: Raik, J. , Stopjaková, V. , Jenihhin, M. , Vierhaus, H., T. , Pleskacz, W. , Ubar, R. , 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, (Tallinn, EE, 18.04.2012-20.04.2012) [2012] Download DOI: 10.1109/DDECS.2012.6219026
  2. Sýkora Jaroslav, Kafka Leoš, Daněk Martin, Kohout LukášMicrothreading as a Novel Method for Close Coupling of Custom Hardware Accelerators to SVP Processors , 2011 14th Euromicro Conference on Digital System Design Architectures, Methods and Tools DSD 2011, p. 525-532 , Eds: Kitsos Paris, 14th Euromicro Conference on Digital System Design Architectures, Methods and Tools DSD 2011, (Oulu, FI, 31.08.2011-02.09.2011) [2011] Download
  3. Sýkora Jaroslav, Kafka Leoš, Daněk Martin, Kohout LukášAnalysis of Execution Efficiency in the Microthreaded Processor UTLEON3 , Architecture of Computing Systems - ARCS 2011, p. 110-121 , Eds: Berekovic Mladen, ARCS 2011. International Conference on Architecture of computing systems /24./, (Camo, IT, 24.02.2011-25.02.2011) [2011] DOI: 10.1007/978-3-642-19137-4_10
  4. Daněk Martin, Kafka Leoš, Kohout Lukáš, Sýkora JaroslavInstruction Set Extensions for Multi-Threading in LEON3 , Proceedings of the13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, p. 237-242, DDECS 2010 : 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, (Vídeň, AT, 14.04.2010-16.04.2010) [2010] Download
  5. Kafka LeošAnalysis of Applicability of Partial Runtime Reconfiguration in Fault Emulator in Xilinx FPGAs , Proceedings 2008 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, p. 178-181 , Eds: Straube Bernd, Drutarovský Miloš, Renovell Michel, Gramata Peter, Fischerová Mária, IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems. DDECS 2008 /11./, (Bratislava, SK, 16.04.2008-18.04.2008) [2008]
  6. Kafka Leoš, Daněk Martin, Novák O.Preservation of Circuit Structure and Timing during Fault Emulation in FPGA , IP 07 IP Based Electronic System Conference & Exhibition Proceedings, p. 493-497 , Eds: Saucier Gabriele, Nguyen Huy-Nam, IP 07 IP Based Electronic System Conference & Exhibition, (Grenoble, FR, 05.12.2007-06.12.2007) [2007]
  7. Kafka Leoš, Daněk Martin, Novák O.A Novel Emulation Technique that Preserves Circuit Structure and Timing , International Symposium on System-on-Chip 2007 Proceedings, p. 15-18 , Eds: Nurmi J., Takala J., Vainio O., International Symposium on System-on-Chip 2007 /9./, (Tampere, FI, 20.11.2007-21.11.2007) [2007]
  8. Kafka LeošA Novel Emulation Technique that Preserves Circuit Structure and Timing , Počítačové architektury a diagnostika 2007 Sborník příspěvků, p. 99-104 , Eds: Vavřička Vlastimil, Počítačové architektury a diagnostika 2007, (Srní, CZ, 17.09.2007-19.09.2007) [2007]
  9. Kafka LeošDevelopment Kit for Xilinx PicoBlaze, ÚTIA AV ČR, (Praha 2007) [2007] Download
  10. Kafka Leoš, Novák O.FPGA-based fault simulator , Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits adn Systems, p. 274-278 , Eds: Reorda M. S., Novák O., Straube B., DDECS 2006. IEEE Design and Diagnostics of Electronic Circuits and Systems, (Prague, CZ, 18.04.2006-21.04.2006) [2006]
  11. Kafka Leoš, Matoušek RudolfDesign Retiming in HDL , Proceedings of Workshop 2005, p. 258-259 , Eds: Říha B., ČVUT, (Praha 2005) , Annual University-Wide Seminar. WORKSHOP 2005 /13./, (Praha, CZ, 21.03.2005-25.03.2005) [2005]
  12. Kafka LeošAn FPGA-based fault injector for TSC circuits , Počítačové architektury a diagnostika, p. 77-81 , Eds: Lórencz R., Buček J., Zahradnický T., ČVUT FEL, (Praha 2005) , Počítačové architektury a diagnostika 2005. PAD 2005, (Lázně Sedmihorky, CZ, 21.09.2005-23.09.2005) [2005]
  13. Kafka Leoš, Kubalík P., Kubátová H., Novák O.Fault classification for self-checking circuits implemented in FPGA , Proceedings of the 8th IEEE Workshop on Design and Diagnostics of Electronics Circuits and Systems, p. 228-231 , Eds: Takách G., Hlawiczka A., Sziray J., University of West Hungary, (Sopron 2005) , IEEE Design and Diagnostics of Electronics Circuits and Systems Workshop /8./, (Sopron, HU, 13.04.2005-16.04.2005) [2005]
  14. Kafka Leoš, Kielbik R., Matoušek Rudolf, Moreno J. M.VPart: An automatic partitioning tool for dynamic reconfiguration. Abstract , FPGA 2005 - ACM/SIGDA Thirteenth International Symposium on Field-Programmable Gate Arrays, p. 263 , Eds: Schmidt H., Wilton S., ACM, (Monterey 2005) , FPGA 2005 /13./, (Monterey, US, 20.02.2005-22.02.2005) [2005]
  15. Kafka Leoš, Daněk MartinRETAC Application Notes 2005, ÚTIA AV ČR, (Praha 2005) [2005]
07.01.2019 - 08:39