Institute of Information Theory and Automation

SMECY - Smart Multicore Embedded SYstems

Project leader: Ing. Martin Daněk, Ph.D.
Department: ZS
Supported by (ID): 7H10001
Grantor: Foreign Grantor
Type of project: theoretical, applicational
Duration: 2010 - 2012
Details: here
Publications at UTIA: list

Abstract:

Project SMECY is partially supported by ARTEMIS Joint Undertaking (project number 100230) and by Ministry of Education, Youth and Sports of the Czech rep. (project number 7H10001). SMECY envisions that recently emerged multi-core technologies will rapidly develop to massively parallel computing environments which, due to improved performance, energy and cost properties, will extensively penetrate the embedded system industry in a few years. This will affect and shape the whole business landscape, e.g. semiconductor vendors need to be capable of offering advanced multi-core platforms to diverse application sectors, IP providers need to re-target existing and develop new solutions to be compatible with evolving multi-core platforms and the need of embedded system houses, in addition to product architecture adaptations and renewing their system, architecture, software and hardware development processes. The mission of SMECY is to develop new programming technologies enabling the exploitation of many (100s) core architectures. The goal of this ARTEMIS project is to launch an ambitious European initiative to match initiatives in Asia (e.g. teams funded by JST/CREST programmes) and USA (e.g. PARLAB in Berkeley, Parallel@illinois and Pervasive Parallelism Laboratory in Stanford) and to enable Europe to become the leader.

Project team:
Responsible for information: ZS
Last modification: 21.05.2013
Institute of Information Theory and Automation