Institute of Information Theory and Automation
Czech
EnglishIng. Jiří Kadlec, CSc.
Position: head of the department
Department: Signal Processing (ZS)
Research interests: Recursive system identification algorithms suitable for FPGA; rapid prototyping of advanced signal processing algorithms; Scalable floating point arithmetic for FPGA SoC designs
Publications at UTIA: list
Email: 
www: home page
Phone: +420 26605 2216
Fax: +420 266052511
Room: 273b
Address: Pod Vodárenskou věží 4, CZ-182 08, Praha 8, Czech Republic
Ph.D graduates:
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List of projects:
- OKO ICT II Branch Contact Organization (Oborová kontaktní organizace ) - 01.04.2013 - 31.12.2016
- Idealist2014 Trans-national cooperation among ICT NCPs - 01.01.2011 - 01.01.2014
- OKO ICT Oborová kontaktní organizace (OKO ICT Branch Contact Organization) - 01.01.2008 - 01.01.2012
- Idealist2011 Trans-national cooperation among ICT National Contact Points - 01.01.2008 - 01.01.2011
- COSINE2 - Co-ordinating Strategies on Embedded Systems in the European Research Area Follow-up Project - 01.01.2007 - 01.01.2010
- VLAM - Virtuální laboratoř aplikace mikroprocesorové techniky (Virtual Laboratory of Microprocessor Technology Application) - 01.01.2006 - 01.01.2011
- AETHER - self-Adaptive Embedded Technologies for Pervasive Computing Architectures - 01.01.2006 - 01.01.2009
- Idealist7fp - Support for participants in ICT Priority by network for IST under the transition to the 7th Framework Programme - 01.01.2006 - 01.01.2008
- Digital Signal Processing Libraries - 01.01.2006 - 01.01.2006
- Double Precision Floating Point Exp and Log Functions - 01.01.2006 - 01.01.2006
Responsible for information: ZS
Last modification: 25.11.2009
Last modification: 25.11.2009
Institute of Information Theory and Automation